amd cpu&gpu 討論post #25 睇#1&有時間幫手填表
Jacksjoke
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佢係扇+argb 一條線過 再駁佢個控制器 再駁底板USB2.0 & sata拎電
一間返去仲要搵驅動程式..其實有冇得方便啲 類似asus asrock有個程式一炮過更新咁
..其實有冇得方便啲 類似asus asrock有個程式一炮過更新咁
3900x等到2046都無貨，睇怕3950x一樣會咁難買，如果轉宜家2950x大家點睇？睇benchmark 3900x仲勁過2950x係唔係繼續等？
睇用途
你要pcie 上TR
你要pcie 上TR
用緊giga x570既留意 官網果邊 最新Bios可以下載返啦
原來有個叫app center
新手唔明
你意思要pcie 4.0就繼續等3900x？
你意思要pcie 4.0就繼續等3900x？
如果你哋係普通用途不用上TR 因為TR提供64條Pcie & 4通道記憶體支援
屋企細只用到itx板，咁都係乖乖地等3900x
Tr只有matx & atx 板
TSMC Announces Performance-Enhanced 7nm & 5nm Process Technologies
TSMC has quietly introduced a performance-enhanced version of its 7 nm DUV (N7) and 5 nm EUV (N5) manufacturing process. The company’s N7P and N5P technologies are designed for customers that need to make then 7 nm designs run faster, or consume slightly lower amount of power.
TSMC’s N7P uses the same design rules as the company’s N7, but features front-end-of-line (FEOL) and middle-end-of-line (MOL) optimizations that enable to either boost performance by 7% at the same power, or lower power consumption by 10% at the same clocks. The process technology is already available to TSMC customers, the contract maker of chips revealed at the 2019 VLSI Symposium in Japan, yet the company does not seem to advertise it broadly.
N7P uses proven deep ultraviolet (DUV) lithography and does not offer any transistor density improvements over N7. Those TSMC clients that need a ~ 18~20% higher transistor density are expected to use N7+ and N6 process technologies that use extreme ultraviolet (EUV) lithography for several layers.
While both N7 and N6 will be ‘long’ nodes that will be used for years to come, TSMC’s next major node with substantial density, power, and performance improvements is N5 (5 nm). The latter will also be offered in a performance-enhanced version called N5P. This technology will also feature FEOL and MOL optimizations in order to make the chips run 7% faster at the same power, or reduce consumption by 15% at the same clocks.
https://www.anandtech.com/show/14687/tsmc-announces-performanceenhanced-7nm-5nm-process-technologies
TSMC has quietly introduced a performance-enhanced version of its 7 nm DUV (N7) and 5 nm EUV (N5) manufacturing process. The company’s N7P and N5P technologies are designed for customers that need to make then 7 nm designs run faster, or consume slightly lower amount of power.
TSMC’s N7P uses the same design rules as the company’s N7, but features front-end-of-line (FEOL) and middle-end-of-line (MOL) optimizations that enable to either boost performance by 7% at the same power, or lower power consumption by 10% at the same clocks. The process technology is already available to TSMC customers, the contract maker of chips revealed at the 2019 VLSI Symposium in Japan, yet the company does not seem to advertise it broadly.
N7P uses proven deep ultraviolet (DUV) lithography and does not offer any transistor density improvements over N7. Those TSMC clients that need a ~ 18~20% higher transistor density are expected to use N7+ and N6 process technologies that use extreme ultraviolet (EUV) lithography for several layers.
While both N7 and N6 will be ‘long’ nodes that will be used for years to come, TSMC’s next major node with substantial density, power, and performance improvements is N5 (5 nm). The latter will also be offered in a performance-enhanced version called N5P. This technology will also feature FEOL and MOL optimizations in order to make the chips run 7% faster at the same power, or reduce consumption by 15% at the same clocks.
https://www.anandtech.com/show/14687/tsmc-announces-performanceenhanced-7nm-5nm-process-technologies
x570 matx太廢了
擺唔落ATX箱唯有itx
擺唔落ATX箱唯有itx
等itx 可能遲啲會更加多選擇
我等唔到喇
i5-2500點頂呀
i5-2500點頂呀
nzxt
個設計sapphire > asrock
TT
終於搵到個軟件..頂佢 官網水冷下載瓜左 兩日都冇人理..TT
晏就返去搞掂佢 熄曬啲燈 換埋前置扇 佢有把前置扇有啲問題 轉果陣地震咁油耳推嫁..